RemotevilleRemote Design Verification Engineer Job in Edinburgh, Scotland, UK Verilab
Design Verification Engineer Verilab
£ -
Computer EngineeringElectronic EngineeringFormal VerificationPeer ReviewsSpecmanStatic Timing AnalysisSystemverilogTraceabilityUniversal Verification Methodology
Senior (5-8 years)
EdinburghScotlandUK
25+ employees
B2BHardwareProfessional ServicesConsulting
Role
Who you are
- Possess a BSc/MSc in Electronic Engineering Computer Engineering or Computer Science.
- Have at least 7 years of project-proven verification experience using SystemVerilog/UVM.
- Demonstrate expertise in creating coverage-driven self-checking verification environments and managing verification planning and implementation.
Desirables
- Specman/e
- C/C++ development
- Formal Verification
- Technical team leadership
- Embedded programming
- Python/Perl scripting
What the job involves
- Work with clients on a variety of verification projects.
- Gain exposure to different designs such as Audio Automotive Comms Processors Space and Video.
- Travel and engage with industry conferences winning awards and shaping standards.
Company
Company mission
Verilab is a leading international firm specializing in functional verification solutions for the semiconductor industry, committed to delivering quality through innovation and expertise. With a focus on best practices, we aim to improve processes and ensure clients' products get to market efficiently and with confidence.Company benefits
- Competitive salary
- Company-sponsored pension
- Medical cover
- Life insurance
- Income protection
- 26 days paid holidays plus statutory days
- Eligibility for bonuses
- Birthday gifts
- Book budget
- Leading industry career and personal development training
Company values
- Integrity
- Excellence
- Collaboration
- Innovation