Creativity, verbal and written communication skills, analytical and problem solving ability
Team player and detail oriented
Basic knowledge of Verilog RTL programming language
Advanced knowledge of UVM and SystemVerilog programming languages
Basic knowledge of the practical application of engineering science and technology
Basic knowledge of ASIC or FPGA based verification
Previous experience with design related to hardware engineering field
Desirables
Creativity
verbal and written communication skills
analytical and problem solving ability
Team player
detail oriented
What the job involves
Be part of a team working on design verification for complex IPs and sub-systems that are a part of modern FPGAs.
Develop and execute verification test plans for IPs and/or sub-systems, including testbench infrastructure, testcase creation, implementing checkers, writing functional coverage and assertions.
Develop reusable verification components for reuse across teams, perform coverage analysis and closure, run simulations and regressions, triage and debug test failures.
To empower every person and every organization to achieve more. We believe technology can and should be a force for good, contributing to a brighter world. Our culture embraces curiosity, progress, and learning together.