Principal Digital ASIC Design Engineer

Skills
Analytical SkillsApplication-Specific Integrated CircuitsArchitectureLaunch VehiclesRadio FrequencySignalSystem On A Chip
Role

What the job involves

The main requirements, responsibilities and hiring steps.

Requirements

  • B.S. or M.S. in Electrical Engineering Computer Engineering or related field
  • 10+ years of digital ASIC design experience with ownership of complex subsystems
  • Proficiency in SystemVerilog or Verilog synthesis and linting tools
  • Experience defining microarchitecture from architecture guidelines and model analysis
  • Experience closing full-chip and subsystem timing with synthesis and static analysis teams
  • Experience with DFT tools for scan and BIST insertion
  • Solid understanding of SoC flows including clock and power domain crossing timing constraints and formal verification
  • Experience developing and integrating DSP blocks for wireless communication
  • Strong experience with EDA tools for design synthesis static timing analysis and power analysis
  • Strong debugging problem-solving and communication skills

Nice to have

  • Technical leader
  • Mentorship
  • Cross-functional collaboration
  • Space systems experience
  • Wireless SoC experience
  • Advanced node tapeouts

Day to day

  • Lead architecture and RTL implementation of digital subsystems for advanced wireless SoCs on space satellites
  • Translate DSP algorithms into efficient hardware blocks such as filters beamformers and FFT/IFFT engines
  • Collaborate across analog mixed-signal verification and backend teams to optimize PPA timing closure and validation