Silicon DD Engineer III
Skills
Application-Specific Integrated CircuitsDigital DesignsGlobal Distribution SystemsInternet ProtocolPerformance MeasurementRTL CodingRTL Design
What the job involves
The main requirements, responsibilities and hiring steps.
Requirements
- 4+ years of experience as a Digital Design Engineer.
- Experience in IP RTL coding specifically for ASIC.
- Proficient in digital design µArchitecture and familiar with Verilog and SystemVerilog.
- Strong scripting skills in Perl Tcl and Python or similar.
Nice to have
- MSEE/BS in EE or CS
- Experience in GPU CPU compression or video ASICs
- Successful project tape-out
Day to day
- Collaborate on µarchitecture development for graphics IP.
- Perform RTL coding for the next version of graphics IP.
- Ensure RTL meets quality metrics including Lint/CDC/RDC checks.
- Work closely with verification teams to develop test plans and ensure coverage.
- Supervise RTL-to-GDS flow and assist with synthesis and timing closure.
- Support early prototyping with FPGA engineers and SOC integration.
Hiring process
- 2 Rounds of interviews
- 45 mins – 1 hour coding exercises