Application-Specific Integrated CircuitsDigital DesignsField-Programmable Gate ArraysGlobal Distribution SystemsLow-Power DesignRTL CodingRTL DesignSystem On A ChipSystemverilogVerilog Digital Designs Field-Programmable Gate Arrays Global Distribution Systems Low-Power Design RTL Coding RTL Design System On A Chip Systemverilog Verilog
Senior (5-8 years) -
CaliforniaUnited States
Performance. Reliability. Innovation.
150+ employees
ITB2BConsultingAutomation
Open for applications
Role
Who you are
4+ years of experience as a Digital Design Engineer
Recent experience with IP RTL coding within the past 2-3 years, specifically for ASIC
Experience having worked on a design from scratch – code from the ground up
Experience in RTL coding and coding for low power in ASICs
Experience in digital design µArchitecture
Strong experience with Verilog and SystemVerilog coding
Perl, Tcl and Python (or similar) scripting experience
Desirables
MSEE/CS or equivalent experience
Work on projects coded from ground up and successfully taped out
Former Meta experience
Developing IP for GPU, CPU, Compression, or Video ASICs
What the job involves
Collaborating on uarchitecture development and performing RTL coding on the next version of our IP
Working on block design implementation for an IP going into future AR products
Ensuring RTL implementation for IP blocks meets quality checks such as Lint/CDC/RDC
Developing test plans and reviewing test coverage with the verification team
Supervising the RTL-to-GDS flow and assisting with synthesis and timing closure
Application process
2 Rounds, 45 mins – 1 hour Coding exercises - fixed/floating point datapath design and ctrl path/FSM design in system Verilog
PRI Global drives change by relentlessly pursuing innovation and excellence through cutting-edge IT solutions. Their services in Enterprise Applications, Data Analytics, Business Intelligence, Cloud Solutions, and AI/ML/Automation ensure that businesses operate at the forefront of technology, transforming challenges into strategic opportunities for growth.
Company benefits
Work on block design implementation for future AR products
Collaborate with a team of designers
Own ASIC IP RTL implementation
Write RTL that meets quality checks
Collaborate with design team to meet requirements
Develop and review test plans with verification team