What the job involves
The main requirements, responsibilities and hiring steps.
Requirements
- Bachelor's degree in Electronic Engineering Computer Engineering or related technical field
- 3-5 years of experience in ASIC or SoC design and verification
- Proficient in SystemVerilog and comfortable with C or C++ for testbench development
- Experience working in Unix/Linux environments with scripting languages like Python Tcl or Perl
- Solid debugging skills across RTL and software layers
- Good communication skills in English
- Experience with hardware emulators or prototyping platforms is a strong plus
- Knowledge of SoC protocols such as Ethernet PCIe AMBA UART or DDR is helpful
Day to day
- Support customer deployments of Synopsys emulation and prototyping platforms by compiling RTL bringing up testbenches and debugging SoC-level verification issues
- Build and troubleshoot emulation testbenches including protocol transactors memory models C++ code and automation scripts
- Reproduce customer-reported issues isolate root causes and collaborate with senior engineers or R&D to drive resolution
- Assist with technical evaluations of hardware assisted verification products and respond to customer technical questions with timely guidance
- Document common issues workarounds and best practices to improve internal knowledge and customer onboarding